这是一篇来自香港的关于数字系统设计的作业代写

 

A.1 SR Latch

In this question, you will experiment with the design of latch circuits.

A.1.1 By means of “pushing bubbles” based off the SR latch shown in class, or otherwise, design an active-low SR-latch with exactly TWO NOR gates plus any number of NOT gates (bubble). When compared with the standard SR-latch shown in class, the active low SR-latch has input S and R. When S is LOW, the output Q is HIGH and Q is LOW. When R is LOW, then Q is HIGH and Q is LOW.

A.1.2 To avoid having both S and R being low, one way is to introduce an additional circuit before the two input signals that avoid that condition. Design this circuit. In short, your circuit has 2 input ports S and R and produces 2 output ports SP and RP. Normally, SP = S and RP = R except when both inputs are 0, then both output are 1.

A.2 Multimode Counter

Design a 4-bit multimode counter that supports 2 modes of operation:

(i) When mode is 0, the counter should increment by 2 every cycle.

(ii) When mode is 1, the counter should increment by 1 every cycle.

Your counter should also have a synchronous reset. At reset, the output should be the number 0(0000000000). The counter wraps back to 0 if the value increments to larger than the maximum representable value.

Implement you multimode counter with VHDL. Submit your VHDL file as multicounter.vhd. Also submit a short answer to this question describing your circuit.

A.3 Variable Bit Rotation

Design a variable bit rotation circuit in this question. A rotation operation is similar to a shift operation except the bits that get rotated are shifted back to the register. Given an n-bit register with values v(3 downto 0), and an input k, your rotator will rotate the four bits of v LEFT by k positions, where 0 k n. Your rotator may take multiple cycles to complete the rotation and assert a done signal when it has finished rotating the bits. It also has a d(3 downto 0) signal for loading a value into v.

A.4 Look Up Table

A.4.1 Implement combinational logic functions using LUT Implement the following combinational logic functions using a 4-input LUT as shown in Figure A.1. In both cases, write down the configuration values of the LUTs.

  • Y = ABCD + ABCD
  • Y = A + BD

A.4.2 A 6 Input LUT Design a 6-input LUT using multiple 4-input LUTs and other combinational

circuits. A 6-LUT has 6 inputs and 1 output, and can be configured to implement any 6-input combinational functions. Draw the diagram of your design and explain how your circuit implement the function of a 6-LUT.

B.1 Music Code Revisit

In Homework 1, you have built a Music Code decoder that receives a symbol sequence as input and decodes the characters corresponding to the corresponding symbols (e.g. the code sequence 070732124646167070 is decoded as “LATTE”). In this homework, you will expand this design with two additional modules:

one for detecting Music Code symbols and one for sending output to the computer.

Music Code: Review In Music Code, everything is being transmitted as musical note. In terms of a communication system, each of these notes is called a symbol and in the case of Music Code, eight symbols are defined:

In the base Music Code protocol, all notes are transmitted as pure sine waves. In other words, for example, the symbol 4 is transmitted as a sine wave with 1174.66 Hz over the air.

B.2 Module 1: Music Code Symbol Detection

The first module you need to design for this homework is a circuit to detect a symbol from an input wave form. The main function of this first module, called symb det, can be decomposed as follows:

(i) Determine when to sample the input;

(ii) Determine the frequency of the input waveform;

(iii) Determine the symbol that is being transmitted;

(iv) Output the corresponding music codes as symbol sequences.

B.2.1 Step 1: When to Detect Symbols? The first question you need to answer when you design this symbol detector is WHEN to start detecting a symbol. Obviously, when there is no transmission, i.e.,the environment is silent, then your detector should be idle too. However, when there are signals that start to arrive, then you need to determine when to make a decision to start the detection, and when to detect the following symbols.

Recall that in the base Music Code protocol, the symbols are transmitted at exactly a rate of 16 symbols per second. Figure B.1 shows the waveform of the first 4 symbols. Starting with no sound, transmission of a Music Code streamlet begins with bursts of sine waves that last for 1/16 seconds each. As a result,once you have begun detecting the first symbol, you need to revisit the waveform at least every 1/16 seconds to look for the next symbol.

Hint: To increase the accuracy of your detector, you may consider delaying the detection point slightly as in Figure B.1 to avoid the period of time when the sine wave frequency changes. However, you do not want to delay too long such that you will miss the waves before the end of the 1/16 seconds period.

B.2.2 Step 2: Measuring Frequency: Zero Crossing Detection Once you are at the point to detect a symbol, your detector will then need to determine the frequency of the input sine wave at that symbol period. There are many methods to determine the frequency of an input signal. Here, we show you one of the easier method that you may consider using in your project: Since the input waveform is given as a pure sine wave, a simple way to determine its frequency is to use a method called zero crossing detection (ZCD). Figure B.2 illustrates the ZCD principle.

With a pure sine wave input, we know that the signal value changes from positive to negative exactly once per period of the wave. Therefore, to determine the frequency of a sine wave, you can simply measure the duration between two consecutive zero crossings with the same direction, i.e., negative-to-positive or positive-to-negative in the input signal.

In your system, the system clock frequency is set to be the same as the sample rate of the input data,i.e., a new sample of the input signal by the ADC is available to your circuit on each cycle. Therefore,you can measure the time between two zero-crossing points by counting the number of cycles between them. In this homework, the sampling rate and clock frequency are both set as sample rate = fclk = 96 kHz.


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