这是一篇来自英国的关于设计一个低噪声放大器（LNA）来实现最大的传感器增益，并且为放大器生成稳定性指标的实验室作业代写
PREREQUISITES
Prior to the lab, read chapter 12 of Microwave Engineering by David Pozar.
AIMS
- Design a low noise amplifier (LNA) to realise the maximum transducer gain
- Generate stability metrics for amplifiers
REPORT GUIDELINES
To pass this course, you will need to provide sufficient evidence that you have taken part in the labs and performed the work yourself.
8 pages maximum, including references. Pages over the limit will be discarded.
Be sure to include in your report formulas you have utilised, schematics, plots, and answers to all the questions distributed throughout this document. You should provide references to qualify your statements, and these should be in IEEE format.
Do not copy sections of the lab script into your report. These will not be awarded marks and will take up space for creditable content.
BACKGROUND
Amplifiers are one of the most important active devices in microwave and millimetre-wave circuits. Power amplifiers are usually found in the transmitting path of a transceiver in which modulated signals are amplified before being passed to antennas for radiation. In contrast with low noise amplifiers(LNAs) which are normally found in the receiving path of a transceiver, power amplifiers are more efficient and can handle higher power. In this lab we will use AWR Microwave Office to design an LNA to realise the maximum transducer gain. The amplifier will operate at 10 GHz and the transistor used here is the Filtronic LPD200. The LPD200 is an Aluminium Gallium Arsenide/Indium Gallium Arsenide (AlGaAs/InGaAs) Pseudomorphic High Electron Mobility Transistor (PHEMT).
Before starting to work on AWR MWO, let’s see how to design a power amplifier with maximum transducer gain. Recall what we learned in lecture 5. A transistor is an active two-port network whose S-parameters can be written as:
𝑺 = [ 𝑆11𝑆 12
𝑆21 𝑆22 ] (3.1)
Fig. 3.1 shows the input port of the transistor is connected to a signal source with internal impedance of 𝑍𝑆 and the output of the port is connected to a load with impedance 𝑍𝐿 . There are usually mismatches at both interfaces. The transducer gain 𝐺𝑇 of the transistor is defined as the ratio of the power delivered to the load to the power available from the source:
𝐺𝑇 = 𝑃𝐿/𝑃𝑎𝑣𝑠= |𝑆21| 2(1−|Γ𝑆|2)(1−|Γ𝐿|2)/|1−Γ𝑆Γ𝑖𝑛| 2|1−𝑆22Γ𝐿|2 (3.2)
To maximise the transducer gain, appropriate input and output matching circuits are required as shown in Figure 3.2.
Conjugate matching is used here to ensure all power available from the signal source is delivered to the input port of the transistor and all power available at the output of the transistor is delivered to the load.
Since the matching networks are also two-port networks, the maximum transducer gain can be expressed as cascaded gains of three two-port networks. Namely, the input matching circuit 𝐺𝑆 , the transistor 𝐺0, and the output matching circuit 𝐺𝐿 . Thus, we have the following equations:
𝐺𝑇 = 𝐺𝑆𝐺0𝐺𝐿 (3.3)
with
𝐺𝑆 = 1−|Γ𝑆|2|/1−Γ𝑖𝑛Γ𝑆| 2
𝐺0 = |𝑆21| 2
𝐺𝐿 = 1−|Γ𝐿|2/|1−𝑆22Γ𝐿| 2
For maximum power transfer, we require conjugate matching:
Γ𝑖𝑛 = Γ𝑆 ∗ (3.4)
Γ𝑜𝑢𝑡 = Γ𝐿 ∗ (3.5)
(3.2) then becomes:
𝐺𝑇𝑚𝑎𝑥 = 1−| 1 Γ𝑆| 2 |𝑆21| 2 1−|Γ𝐿|2/|1−𝑆22Γ𝐿| 2 (3.6)
To calculate the maximum transducer gain of an amplifier, we need to find Γ𝑆 , Γ𝐿 , 𝑆21, and 𝑆22. All these variables are dependent upon the S-parameters of the transistor:
with
𝐵1 = 1 + |𝑆11| 2 − |𝑆22| 2 − |Δ| 2
𝐵2 = 1 + |𝑆22| 2 − |𝑆11| 2 − |Δ| 2
𝐶1 = 𝑆11 − 𝑆22∗ Δ
𝐶2 = 𝑆22 − 𝑆11∗ Δ
Δ = 𝑆11𝑆22 − 𝑆12𝑆21
Through use of (3.6), the maximum transducer gain can be calculated from the S-parameters of a given transistor at the frequency of interest. We can also use the S-parameters to design the corresponding input and output matching circuits. For off-the-shelf transistors, S-parameters are normally available from manufacture’s website. For MMIC transistors, the S-parameters need to be measured using an on-wafer vector network system. Note the detailed derivation of the equations 3.7 and 3.8 is not given here. If you are interested, please refer to chapter 12 of Microwave Engineering by D. Pozar.
Now let’s see how we can use Microwave Office to design a low noise amplifier based on an off-the-shelf transistor to achieve the maximum transducer gain. Firstly, you will simply verify an example given in Pozar’s book. You will then design a low noise amplifier with a commercially available transistor.
EXPERIMENT 1: AMPLIFIER DESIGN EXAMPLE VERIFICATION
Referring to example 12.3 in Microwave Engineering 4 th edition:
Design an amplifier for maximum gain at 4 GHz using single-stub matching sections. Calculate and plot the input return loss and the gain from 3 to 5 GHz. The transistor is a GaAs MESFET with the following scattering parameters (𝑍0 = 50Ω).
Q1 What is the maximum achievable amplifier gain at 3 GHz and 5 GHz?
▪ Create a new project and a new Circuit Schematic
▪ Create a data file (touchstone S2P file) based on the given S-parameters in the above table:
o Right-click Data Files under the Project Tree
o Create a New Data File
o Select Touchstone File, then click Create.
o Paste in the following:
▪ Create a transistor model
o Go back to the circuit schematic
o In the Elements tree, navigate to Circuit Elements > Subcircuits.
o Drag and drop the model named the same as the data file created above onto the design window.
o Right-click on the model and click Properties. Navigate to the Symbol tab and select ‘FET2@system.syf’ from the list. Then click OK.
▪ Build the input and output matching circuits as shown in the below figure. You will need to calculate the lengths according to the guide wavelength.
▪ Set up the simulation by setting the correct frequency range and placing two 50 Ω ports. Referring to Fig. 3.3, you need to place these ports at the points where the 50 Ω resistances connect to the respective matching circuits.
▪ Plot the maximum gain versus frequency and comment on the behaviour of the return loss and gain.
EXPERIMENT 2: LNA DESIGN WITH AN OFF-THE-SHELF TRANSISTOR
In this experiment, you will design a matching network to achieve maximum transducer gain for a given transistor at 10 GHz.
▪ Create a new Circuit Schematic
▪ In the Elements pane, navigate to Libraries > AWR web site > Parts By Vendor > Filtronic > Chip data files
▪ Place the lpd200r_5 model on the schematic area. Press CTRL-K and select Explicit ground node under the Grounding Type. Click OK.
▪ Place the 3-terminal subcircuit model on the schematic and delete the 2-terminal subcircuit model you originally placed.
▪ Right-click on the model and click Properties. Navigate to the Symbol tab and select ‘FET2@system.syf’ from the list. Then click OK. Connect terminal 3 to ground and connect ports to terminals 1 and 2.
▪ Plot the following parameters:
o S-parameters
o Stability factors K, B1 and Mu (Measurement Type > Linear > Circle > SCIR1)
o Stability circles (Measurement Type > Linear > Circle > SCIR1)
Q2 Does the transistor have any unconditional stability regions? If yes, at which frequencies and why?
Design matching circuits to achieve the maximum transducer gain at 10 GHz.
▪ Start by finding the S-parameters at 10 GHz in the datasheet by navigating to Project Tree > Data Files and double-clicking on lpd200r_5. The S-parameters are given in the following format:
𝑓 (𝐺𝐻𝑧) |𝑆11| ∠𝑆11° |𝑆21 | ∠𝑆21° |𝑆12 | ∠𝑆12° |𝑆22 | ∠𝑆22°
▪ Calculate Γ𝑆 and Γ𝐿 from equations (3.7) and (3.8). Based on these values, you should be able to calculate the required transmission line network for conjugate matching.
▪ Plot 𝐺𝑇𝑚𝑎𝑥 versus frequency and compare this to the value calculated via equation (3.6).